Table of Contents
- Introduction
- Chapter 1: Dropout Voltage
- Chapter 2: Capacitors and Capacitance
- Chapter 3: Thermal Performance
- Chapter 4: Quiescent Current
- Chapter 5: Current Limiting
- Chapter 6: Reverse Current Protection
- Chapter 7: Power Supply Rejection Ratio (PSRR)
- Chapter 8: Noise
- Related Resources
- FAQ Section
Introduction
By Wilson Fwu
Power management is a fundamental module in electronic systems. From smartphones to computers and most electronic devices we know, this module enables functionality. As portable electronics demand grows with increasing computational power and sensor diversity, power management design faces higher requirements.
Low-dropout regulators (LDOs) provide a common method to convert higher input voltages to stable, slightly lower output voltages while maintaining minimal voltage differentials. While generally easy to design, modern applications often require careful LDO selection based on system characteristics and operating conditions.
This eBook comprehensively covers essential LDO knowledge through concise, digestible chapters originally published in TI's "LDO Basics" blog series. For deeper exploration, refer to accompanying videos on TI's LDO training portal.
👉 Explore advanced power management solutions
Chapter 1: Dropout Voltage
By Aaron Paxton
What is Dropout Voltage?
Dropout voltage (VDO) is the minimum required difference between input (VIN) and output (VOUT) voltages for proper regulation:
VIN ≥ VOUT(nom) + VDO
When VIN falls below this threshold, the LDO enters dropout:
VOUT(dropout) = VIN - VDO
Key Factors Affecting Dropout:
| Factor | Effect on VDO |
|--------|--------------|
| PMOS LDO | Decreases with higher VOUT |
| NMOS LDO | Decreases with higher VOUT |
| Output Current | Increases with higher IOUT |
| Temperature | Increases with higher TJ |
Architecture Differences
PMOS LDOs use a P-channel MOSFET where decreasing RDS maintains regulation. VDO improves at higher voltages as VGS becomes more negative.
NMOS LDOs may use bias rails (VBIAS) or charge pumps to achieve ultra-low dropout by maintaining higher VGS at low voltages.
Chapter 2: Capacitors and Capacitance
By Wilson Fwu
Selecting Output Capacitors
LDOs require output capacitors for stability. Key considerations:
Capacitor Materials Comparison:
| Material | Pros | Cons |
|----------|------|------|
| Ceramic | Low ESR, small size | DC bias derating |
| Tantalum | Long lifespan | Polarized |
| Aluminum | High capacitance | Large size, high ESR |
Real-World Capacitance can be significantly lower than rated due to:
- DC bias derating (up to 90% reduction)
- Temperature effects (X7R/X5R recommended)
- Manufacturer tolerances (±20%)
Example Calculation:
A 10μF ceramic capacitor (0603 package) at 1.8V output with 250mA load may deliver only 3.5μF effective capacitance due to combined derating factors.
Chapter 3: Thermal Performance
By Wilson Fwu
Critical Parameters
- Thermal Resistance (RθJA): Lower values indicate better heat dissipation
- Junction Temperature (TJ): Must stay within -40°C to 125°C
Thermal Design Example:
For TPS732 converting 5.5V→3V at 250mA:
- SOT-23 (205.9°C/W): TJ = 154.7°C
- SOT-223 (53.1°C/W): TJ = 58.5°C
Cooling Techniques:
- Increase copper area on PCB layers
- Use heat sinks for TO-220/TO-263 packages
- Add series resistors to share power dissipation
- Optimize component placement
👉 Thermal management components
Chapter 4: Quiescent Current
By Wilson Fwu
Why IQ Matters
Quiescent current (IQ) is consumed when the system is idle. For battery-powered devices, minimizing IQ extends standby time:
Example:
TPS7A05 offers 1μA IQ in a 0.65mm² package - ideal for wearables/IoT.
Design Tips:
- Use enable/disable pins to cut power when unused
- Select CMOS image sensors and gimbals with low-noise LDOs
- Consider shutdown current (typically hundreds of nA)
Chapter 5: Current Limiting
By Jose Gonzalez Torres
Protection Mechanisms
Brick-Wall Limiting: Hard current cutoff at defined threshold (e.g., TPS7A16 limits to 105mA at 30VIN)
Foldback Limiting: Reduces current as VOUT drops to limit power dissipation
Key Benefits:
- Prevents damage during shorts
- Enables safe NiCd/NiMH battery charging
- Protects sensitive downstream electronics
Chapter 6: Reverse Current Protection
By Mark Sellers
Prevention Methods:
- Schottky Diodes: Blocks body diode conduction
- Input Series Diodes: Prevents current backflow
- Back-to-Back FETs: Used in automotive LDOs like TPS7B7702-Q1
- Ground-Connected Bulk: Eliminates body diode (e.g., TPS7A37)
Chapter 7: PSRR
By Aaron Paxton
Key Insights:
PSRR = 20log(Vripple(in)/Vripple(out))
Improvement Techniques:
- Increase VIN-VOUT margin
- Optimize output capacitance (10μF improves 1MHz PSRR by 19dB vs 1μF)
- Use noise reduction capacitors
Chapter 8: Noise
By Aaron Paxton
Noise Reduction:
- NR/SS Capacitors: Filters reference noise (100nF reduces TPS7A91 noise to 4.7μVRMS)
- Feedforward Capacitors: Improves stability and PSRR
Noise Spectrum:
- Dominates at low frequencies (10-100Hz)
- Audio apps should focus on 20Hz-20kHz range
FAQ Section
Q: How do I select an LDO for my 5G modem?
A: Prioritize high PSRR (>60dB @ 100kHz) and low noise (<10μVRMS) with adequate current capability.
Q: Can LDOs replace switching regulators?
A: Only for low power (<1A) or when input-output differential is small, as LDOs dissipate excess power as heat.
Q: What's the smallest LDO available?
A: TI's TPS7A05 comes in 0.65mm × 0.65mm WLCSP packaging.
Q: How does temperature affect LDO performance?
A: Higher temperatures increase dropout voltage and may trigger thermal shutdown (~160°C).